ASIC, Bit-Slice and me - My Career in Text

Dec, 2008/Sept 2009

Material from my Seminars: I have most of this on-line.

AMCC Arrays

"High Performance Logic Array Design" 1985 is an updated version of the seminar from which the text "Logic Design for Array-Based Circuits" was taken. This seminar (and the book) documents the bipolar array design flow from schematic capture thru wafer fabrication for the bipolar (and biCMOS) semicustom arrays. This design methodology is the basis of what we do today in the world of ASIC and FPGA design. The AMCC arrays pre-dated the advent of edif (a standard netlist), RTL (VHDL and Verilog), the arrival of design synthesis tools (such as Synopsys Design Compiler), and Critical path analysis was done with a calulator, not with PrimeTime. Knowing what was done and why explains what we do today (and why). While the process methodology has changed from 5 micron to 0.18 micron, most of the design flow remains intact. We just have a few more concerns these days do to the miniaturization.

AMCC Q20000 MIL5 Macro Library

While obsolete (AMCC discontinued the ASIC part of its business in 1995), many peopl are still interested in the library. Especially those tasked with trying to build replacements for the military's aging chips. This document supports the Array Seminar. Sorry - no process details (base die construction) were ever included in the classroom. That remains proprietary.The library (which bears a striking similarity to today's macro libraries - which is to be expected) resided on the 2-layer metal above the standard base die.

AMCC Q20000 Quicksheets

Since array designs in the 80s and 90s were shcematic capture, the quicksheets allowed rapid look-up of the desired functions so macors could be quickly selected fromt he name list on the DASIX, Mentod or Valid schematic capture systems. Think electronic blueprints.


ED2900A Introduction to Designing with the 2900 Family
This seminar (a later one is on-line at Bit-Savers) was taught for four years by D. E. White and was the basis for the best-selling textbook, Bit-Slice Design: Controllers and ALUs. 10/80

The Bit-Slice Teacher's Guide
Written to include exercises (and solutions) and examples to support the ED2900A and ED2900B Seminars.
Covers Q&A concerning the old datasheets but also shows microprogramming of the simple class exercises, leading up to the ability to handle a full CPU microcode set. This document was set along to anyone teaching the Bit-Slice seminar, which (is/was) used by colleges and universities as well as company-internal training at customer sites.

ED2900B Microprogrammable Computer Architecture
This advanced seminar was part of a 10-day training blitz on the AMD 2900 bit-slice family. Labeled as a "PhD in a week" by the students from JPL, it was the follow-on to the best-selling text Bit Slice Design: Controllers and ALUS, and covered CPU design, including a follow-on lab class using the Trace 29 debug system and the HEX 29 computer board. Day 1 ans Day 2 seminar pages are available. 1981

AMD Bit-Slice Application Notes by D. E. White

Firmware Level Interrupts for the 2900 ran in Designer's Notebook in Digital Design magazine, pages 262-263, March 1981.

Hardware Level Interrupts for the 2900 Family was not published but was used in the training seminars.

Programming the Am2910 was not published but was used in the training seminars 2/82

def file for the Am29203 was not published but was used in the training seminars 5/81

Toward Structured Microprogramming with AMDASM: The Am2901C and the Am2910A was not published but was used in the training seminars 2/82 [AMSADM was the AMD Meta-assembler]

Structured Microcode was internally published at Raytheon as part of the militarized VAX project (not available) 10/83

AMD Databook - 1995 - on-line at Bit-Savers
Contains datasheets for all the members of the bit-slice family. AMD no longer supports the 2900. A number of the parts are, however, available as IP from IP Vendors. These are soft IP (RTL code). If you are designing with them (and many people are), use the vendor's datasheets and the process library data for the array.